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MP7533
15 V CMOS Multiplying10-Bit Digital-to-Analog Converter
FEATURES
* * * * * * * * * 10-Bit Resolution Non-Linearity: 1/2 LSB to 2 LSB Nonlinearity Tempco: 0.2 ppm of FSR/C, Max. Low Power Dissipation: 20 mW Current Settling Time: 500 ns Feedthrough Error: 1 mV p-p @ 10 kHz, Max. TTL/CMOS Compatible Latch-Up Free Improved Replacement for AD7533
BENEFITS
* Accurate Converter at Low Cost * Can be used in Reverse Mode (Voltage Out) * Flexible Design
APPLICATIONS
* * * * Digital/Analog Multiplication Character Generation Programmable Power Supplies Gain Controlled Circuits
GENERAL DESCRIPTION
The MP7533 is a low cost, 10-bit multiplying Digital-to-Analog Converter. This device uses EXAR's patented advanced thin film resistor and CMOS technologies, providing up to 10-bit accuracies with TTL/CMOS compatibility.
Pin and functional equivalent to the industry standard MP7520, the MP7533 is recommended as a lower cost alternative for old MP7520 sockets or new 10-bit DAC designs. The MP7533 applications include: digital-to-analog multiplication, CRT character generation, programmable power supplies, digitally controlled gain circuits, etc.
SIMPLIFIED BLOCK DIAGRAM
VDD
2R VREF 4R 4R 4R 4R
2R
2R
RFB 4R 4R R
4R
IOUT1 IOUT2 2 to 3 Decoder Switch Drivers & Switches
R = 10k
BIT 1 MSB
BIT 10 LSB
3 Segment D/A Converter with Termination to DGND Logical "1" at Digital Input Steers Current to IOUT1
Rev. 2.00 1
MP7533
ORDERING INFORMATION
Package Type
Plastic Dip Plastic Dip Plastic Dip SOIC SOIC SOIC Ceramic Dip Ceramic Dip Ceramic Dip Ceramic Dip Ceramic Dip Ceramic Dip
Temperature Range
-40 to +85C -40 to +85C -40 to +85C -40 to +85C -40 to +85C -40 to +85C -40 to +85C -40 to +85C -40 to +85C -55 to +125C -55 to +125C -55 to +125C
Part No.
MP7533JN MP7533KN MP7533LN MP7533JS MP7533KS MP7533LS MP7533AD MP7533BD MP7533CD MP7533SD* MP7533TD* MP7533UD*
INL (LSB)
+2 +1 +1/2 +2 +1 +1/2 +2 +1 +1/2 +2 +1 +1/2
DNL (LSB)
+1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1
Gain Error (% FSR)
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5
*Contact factory for non-compliant military processing
PIN CONFIGURATIONS
IOUT1 IOUT2 GND (MSB) BIT 1 BIT 2 BIT 3 BIT 4 BIT 5
See Packaging Section for Package Dimensions
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
RFB VREF VDD BIT 10 (LSB) BIT 9 BIT 8 BIT 7 BIT 6
16 15
See Pin Out at Left
14 13 12 11 10 9
16 Pin CDIP, PDIP (0.300") D16, N16
16 Pin SOIC (Jedec, 0.300") S16
PIN OUT DEFINITIONS
PIN NO. 1 2 3 4 5 6 7 8 NAME IOUT1 IOUT2 GND BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 DESCRIPTION Current Output 1 Current Output 2 Ground Data Input Bit 1 (MSB) Data Input Bit 2 Data Input Bit 3 Data Input Bit 4 Data Input Bit 5 PIN NO. 9 10 11 12 13 14 15 16 NAME BIT 6 BIT 7 BIT 8 BIT 9 BIT 10 VDD VREF RFB DESCRIPTION Data Input Bit 6 Data Input Bit 7 Data Input Bit 8 Data Input Bit 9 Data Input Bit 10 (LSB) Positive Power Supply Reference Input Voltage Internal Feedback Resistor
Rev. 2.00 2
MP7533
ELECTRICAL CHARACTERISTICS
(VDD = + 15 V, VREF = +10 V unless otherwise noted)
25C Typ Tmin to Tmax Min Max
Parameter STATIC PERFORMANCE1 Resolution (All Grades) Integral Non-Linearity (Relative Accuracy) A, S, J B, T, K C, U, L Differential Non-Linearity A, S, J B, T, K C, U, L Gain Error Gain Temperature Coefficient2 Power Supply Rejection Ratio Output Leakage Current REFERENCE INPUT Input Resistance DIGITAL INPUTS3 Logical "1" Voltage Logical "0" Voltage Input Leakage Current ANALOG OUTPUTS Output Capacitance2
Symbol
Min
Max
Units
Test Conditions/Comments FSR = Full Scale Range
N INL
10
10
Bits LSB Best Fit Straight Line Spec. (Max INL - Min INL) / 2
+2 +1 +1/2 DNL +1 +1 +1 GE TCGE PSRR IOUT +30 +50 +50 +0.4 +1.5
+2 +1 +1/2 LSB +1 +1 +1 +1.5 +2 +50 +200 % FSR ppm/C ppm/% nA Using Internal RFB Gain/Temperature |Gain/VDD| VDD = + 5%
RIN
5
10
20
5
20
k
VIH VIL ILKG
3.0
2.4 0.8 +1
3.0 0.8 +1
V V A
COUT1 COUT1 COUT2 COUT2 POWER SUPPLY4 Functional Voltage Range2 Supply Current Total Dissipation NOTES:
1 2 3 4
52 26 13 45
pF pF pF pF
DAC Inputs all 1's DAC Inputs all 0's DAC Inputs all 1's DAC Inputs all 0's
VDD IDD
4.5 20
15 2
4.5
15 2
V mA mW
All digital inputs = 0 or all = 5 V
Full Scale Range (FSR) is 10V for unipolar mode. Guaranteed but not production tested Digital Input levels should not go below ground or exceed the positive supply voltage, otherwise damage may occur. Specified values guarantee functionality. Refer to other parameters for accuracy.
Specifications are subject to change without notice
Rev. 2.00 3
MP7533
ABSOLUTE MAXIMUM RATINGS (TA = +25C unless otherwise noted)1, 2
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +17 V Digital Input Voltage to GND . . . . GND -0.5 to VDD +0.5 V IOUT1, IOUT2 to GND . . . . . . . . . . . . . . . . -0.5 to VDD +0.5 V VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +25 V VRFB to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +25 V Storage Temperature . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 10 seconds) . . . . . . +300C Package Power Dissipation Rating to 75C CDIP, PDIP, SOIC, PLCC . . . . . . . . . . . . . . . . . . 700mW Derates above 75C . . . . . . . . . . . . . . . . . . . . . 10mW/C
NOTES: 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2 Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps (HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short transients outside the supplies of less than 20mA for less than 100s.
APPLICATION NOTES Refer to Section 8 for Applications Information
Rev. 2.00 4
MP7533
16 LEAD CERAMIC DUAL-IN-LINE (300 MIL CDIP) D16
S1 See Note 1
16 1
S
9 8
E1 D Base Plane Seating Plane L e b b1 L1 c Q A E
INCHES SYMBOL A b b1 c D E E1 e L L1 Q S S1 MIN -- 0.014 0.038 0.008 -- 0.220 0.290 MAX 0.200 0.023 0.065 0.015 0.840 0.310 0.320
MILLIMETERS MIN -- 0.356 0.965 0.203 -- 5.59 7.37 MAX 5.08 0.584 1.65 0.381 21.34 7.87 8.13 NOTES -- -- 2 -- 4 4 7 5 -- -- 3 6 6 --
NOTES 1. Index area; a notch or a lead one identification mark is located adjacent to lead one and is within the shaded area shown. 2. The minimum limit for dimension b1 may be 0.023 (0.58 mm) for all four corner leads only. 3. Dimension Q shall be measured from the seating plane to the base plane. 4. This dimension allows for off-center lid, meniscus and glass overrun. 5. The basic lead spacing is 0.100 inch (2.54 mm) between centerlines. 6. Applies to all four corners. 7. This is measured to outside of lead, not center.
0.100 BSC 0.125 0.150 0.015 -- 0.005 0 0.200 -- 0.060 0.080 -- 15
2.54 BSC 3.18 3.81 0.381 -- 0.13 0 5.08 -- 1.52 2.03 -- 15
Rev. 2.00 5
MP7533
16 LEAD PLASTIC DUAL-IN-LINE (300 MIL PDIP) N16
S
16 1 Q1 D
9 8 E1 E A1
Seating Plane
A L B e B1
C
INCHES SYMBOL A A1 B B1 (1) C D E E1 e L MIN -- 0.015 0.014 0.038 0.008 0.745 0.295 0.220 MAX 0.200 -- 0.023 0.065 0.015 0.785 0.325 0.310
MILLIMETERS MIN -- 0.38 0.356 0.965 0.203 18.92 7.49 5.59 MAX 5.08 -- 0.584 1.65 0.381 19.94 8.26 7.87
0.100 BSC 0.115 0 0.055 0.020 (1) 0.150 15 0.070 0.080
2.54 BSC 2.92 0 1.40 0.51 3.81 15 1.78 2.03
Q1 S Note:
The minimum limit for dimensions B1 may be 0.023" (0.58 mm) for all four corner leads only.
Rev. 2.00 6
MP7533
16 LEAD SMALL OUTLINE (300 MIL JEDEC SOIC) S16
D
16
9
E
H
8
h x 45 C Seating Plane e B A1 L A
INCHES SYMBOL A A1 B C D E e H h L MIN 0.097 0.0050 0.014 0.0091 0.402 0.292 MAX 0.104 0.0115 0.019 0.0125 0.412 0.299
MILLIMETERS MIN 2.46 0.127 0.356 0.231 10.21 7.42 MAX 2.64 0.292 0.482 0.318 10.46 7.59
0.050 BSC 0.400 0.010 0.016 0 0.410 0.016 0.035 8
1.27 BSC 10.16 0.254 0.406 0 10.41 0.406 0.889 8
Rev. 2.00 7
MP7533
NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contains here in are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright EXAR Corporation Datasheet April 1995 Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
Rev. 2.00 8

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